Abstract

The authors describe a digital signal processing (DSP) modem with a low cycle skipping rate for use in earth stations such as the very small aperture terminal (VSAT). The VSAT system considered uses forward error correction (FEC) consisting of Viterbi and Fano sequential decoders. The FEC requires that the modem's carrier phase and symbol timing recovery systems maintain control in a low E/sub b//N/sub 0/ environment. This is to assure sufficient error correction performance. The authors present the configuration of a highly integrated variable baud-rate DSP modem and describe how the cycle skipping rate was reduced to satisfy the above requirements. A prototype DSP modem was built using LSIs and the cycle skipping rate was experimentally verified to be less than 10/sup -12/ at C/N=3 dB (E/sub b//N/sub 0/=0 dB). This is sufficient for good FEC performance. >

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