Abstract
An N-level quantizer circuit (14) has an analog input terminal and N-1 digital output terminals, and includes a sampling circuit (SW samp) coupled to the input terminal for providing a sampled input voltage signal; at least one preamplifier stage (14A) for converting the sampled input voltage signal to a current signal and providing an amplified sampled input signal; and N-1 comparator stages (14B) each having an input coupled to an output of the at least one preamplifier stage (14A) and sharing the input current equally. Individual ones of the N-1 comparator stages (14B) operate to compare the amplified sampled signal to an associated one of N-1 reference signals. The quantizer (14) further includes N-1 latches (14C), individual ones of which latch an output state of one of the N-1 comparators and have an output coupled to one of the N-1 digital output terminals of the quantizer circuit (14).
Published Version
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