Local mapping of interface traps in HfSiO/Si structure by scanning capacitance microscopy using dV/dC signal

Abstract

Scanning capacitance microscopy (SCM) using a dV/dC signal has been proposed for local mapping of interface traps in an insulator/semiconductor structure. In conventional SCM measurements using a dC/dV signal, it is difficult to accurately analyze the spatial distribution of interface traps from the obtained SCM images because the dC/dV signal is inversely proportional to the interface trap density. In the proposed technique, however, the spatial distribution of the interface traps can be characterized using the dV/dC signal, which is directly proportional to the interface trap density. The effectiveness of the proposed technique has been demonstrated by characterizing the spatial distributions of the interface traps in HfSiO/Si structures before and after H2 annealing. The dV/dC images obtained reveal that the spatial variation in the interface trap density is reduced by H2 annealing. Consequently, SCM measurements using a dV/dC signal have been verified to effectively characterize the spatial distribution of interface traps.