Abstract
SummaryThis paper introduces a design strategy to reduce rise time of charge pumps maintaining equal the silicon area, which is effective when the load capacitance is lower than the total charge pump capacitance. The strategy relies on an unconventional pumping capacitors sizing, which set them not equal and follows a linear distribution. The approach is based on a theoretical analysis and is validated through post‐layout simulations using a 130‐nm complementary metal‐oxide semiconductor (CMOS) standard technology. The simulations demonstrate the advantages of the proposed design strategy and the accuracy of the theory.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: International Journal of Circuit Theory and Applications
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
