Abstract
The influence of doping profiles, traps and grain boundaries in the semiconductor on the C- V characteristics of ideal MIS diodes is calculated. In addition, it is shown that losses and frequency dispersion as well as hysteresis effects can result from traps in the semiconductor. If these semiconductor properties are ignored misinterpretations in terms of interface state density will arise which can be about 10 12 cm −2. In the case of decreasing doping profiles and traps in a n-type semiconductor one will get an apparent positive surface charge while an apparent negative surface charge will result from increasing profiles and grain boundaries. A method for the experimental determination of the C- V characteristics of ideal MIS diodes is developed. This method is applicable to stable diodes with only shallow traps in the semiconductor.
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