Abstract
In this paper, a transient voltage suppressor (TVS) using a native lateral back-to-back diode structure in conventional complementary metal–oxide–semiconductor (CMOS) technology is proposed. The capacitance, direct-current (DC) current–voltage (I–V) characteristics, and transmission line pulse (TLP) I–V characteristics of this lateral back-to-back diode are investigated. An optimization guideline for the lateral device is presented. The lateral structure is also suitable for the advanced wafer-level chip-scale package (WL-CSP) technology to meet the low capacitance and small footprint requirement for high-frequency or handheld device applications. This is a simple solution for a low-capacitance and low breakdown-voltage protection device against electrostatic discharge and electrical overstress in discrete or on-chip applications.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
