LASOS—laser annealed silicon on sapphire

Abstract

Laser annealing techniques were successfully incorporated into standard MOS/SOS processing to increase transistor channel mobility and processing yield. Silicon islands were photolithographically defined and chemically etched (by KOH) on standard SOS wafers. The islands were exposed to radiation from an excimer laser (λ = 2490 Å) having a pulse duration of 25 ns, a beam size in the range of 0.1-0.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and an energy density in the range of 0.5 - 1.0 J/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Using standard processing techniques MOS transistors were fabricated and characterized. It was found that exposure at an energy density of ∼0.80 J/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> results in rounding the Si island edges, thus eliminating the "V"-shaped groove profile of the gate oxide and improving Al step coverage. The electrical characteristics of MOS transistors fabricated over laser annealed islands exhibited a 30-percent increase in channel mobility with a small negative shift (<0.2 V) in the transistor threshold voltage.