KGD production for controlled chip collapse connection (C4) applications

Abstract

A description of several approaches used for production of known good die at IBM Microelectronics Division's bond, assembly and test facility in Poughkeepsie, New York is presented. Known good die (KGD) are used in all electronic assemblies. In some cases, the die are required to be assembled to a higher level of assembly in unpackaged form, or as a bare die. These are the die most often referred to as KGD. Use of bare die is driven by packaging weight/size reduction or by demand for high level of silicon integration with the specific application requirement driving the quality requirement placed on the KGD. Currently, the lowest quality and highest volume segment of the market is capable of achieving most of its requirements at wafer test, while the moderate quality/reliability and high volume segment is driving strongly in the wafer level test and burn-in direction. For the highest quality and reliability sector of the market, temporary chip attach (TCA) processes must be used for production of KGD. The cost of KGD production is a major consideration which must be addressed uniquely for each different die's requirements. The processes used to create KGD for C4 chips for high end mainframe server applications, microprocessors and memory die are described.