(Invited) Ru Selective Metal Deposition for Hybrid Metallization in Nano-Interconnect Applications

Abstract

The connection of semiconductor devices happens through metal interconnects at the back end of line (BeOL) in integrated circuits. The BeOL consists of multiple metal levels that are vertically connected through small contact holes, or so-called vias. Especially at the lower metal levels, the vias are becoming much smaller in critical dimension, which increases their resistance significantly while more of these vias are needed to make the more complex connections in future device architectures. For these reasons, the vias resistance is becoming the dominating part of the total resistance of the stack and may become the limiting factor in keeping resistance-capacitance delay under control.In this work, the metal-on-metal area selective metal deposition is studied to make low resistive vias. The via is first prefilled with the Ru before performing the Cu metallization of the remainder of the vias and wires. Ru is chosen as the preferred metal [1] because it can be used without a metal barrier (it does not electromigrate) and this provides a large resistance benefit as compared to the Cu metallization which needs a TaN barrier combined with a Co liner. The combination of the different metals for the via (here Ru) and the metallization of wires (here Cu), is called a hybrid metallization scheme.We will discuss the challenges for the Ru selective deposition on the metal (growth area) towards different dielectrics as the non-growth area. The selectivity studies to optimize the Ru chemical vapour deposition (CVD) recipe and surface treatments are performed on blanket level (non-patterned wafers). A small molecule inhibitor dimethylamino-trimethylsilane (DMA-TMS) is used to passivate the dielectric surface which makes the dielectrics less reactive towards the Ru deposition improving thereby the selectivity of the CVD process (see also Fig.a).[2] We demonstrate that the growth rate and selectivity of Ru ASD depend on the CVD process conditions (type of co-reactant and process temperature) and the type of nanopattern (line spaces or via holes).[3]The most selective Ru process found with the line-space pattern (45/45nm line-space width) was also tested in nanoscale patterns with via holes of ~10.5nm.[4] It was found that the Ru growth rates in the patterned structures are enhanced as compared to the blanket substrates. The CVD Ru growth rates are ~ 1.3x higher in line-space nanopatterns as compared to flat metal substrates, and up to 3x higher in the small contact holes.[4] The growth enhancement of the CVD process is beneficial for the technological implementation of the process. The results show that the growth rate and the selectivity are different from the behavior on blankets and are also pattern dependent, which is consistent with a growth mechanism that is based on diffusion in addition to adsorption.[2] Therefore, the metal-on-metal selective deposition process may need to be optimized and adjusted to the patterned structure used in the interconnect application.[1] D. Gall et al, J. Appl. Phys. 2016, 119, p.085101.[2] F. Grillo and J. Soethoudt et al, Chem. Mater. 2020, 32, 22, 9560–9572.[3] A. Kumar Mandal et al, “Ruthenium Area-Selective Deposition for Nano-interconnect Structures: Process and nanopattern dependent selectivity and growth rate” Manuscript in submission 2023.[4] M.H. van der Veen et al, Proc. of the IITC 2021, S7-2.. Figure 1