Abstract
This paper gives an overview of the impact of certain processing steps on the low-frequency (LF) noise behavior of silicon Gate-All-Around (GAA) Vertical Nanowire (VNW) MOS transistors. It is shown that the width of a Replacement Metal Gate (RMG) cap impacts the flicker noise Power Spectral Density (PSD). The type of source contact, i.e., bulk versus a confined top contact significantly changes the nature and the magnitude of the 1/f noise. Finally, the doping density of the silicon nanowires has a subtle influence, whereby the dominant fluctuation mechanism shifts from number to mobility fluctuations, while increasing the doping density. Optimal noise performance is achieved for intermediate in-situ nanowire B doping density.
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