(Invited) 14nm FDSOI Technology for High-Speed and Energy-Efficient CMOS

Abstract

This work presents a 14nm technology designed for high speed and energy efficient applications using FDSOI transistors. The specific process integration features of this technology are highlighted in this paper. The transistors have been strain-engineered to provide high drive current and optimally designed to achieve low parasitic capacitance. As a result, this 14nm FDSOI technology provides 0.55x area scaling and delivers +50% speed with -100mV Vdd supply voltage operation compared to the 28nm FDSOI technology.