Investigation on the change of the performance of Si-Zn-Sn-O thin film transistors under negative bias temperature stress depending on the channel thickness

Abstract

Amorphous silicon doped zinc tin oxide (a-SZTO) thin film transistors (TFTs) have been fabricated by RF-magnetron sputtering at room temperature. The effect of different channel thickness on the electrical properties and the stability of a-SZTO TFTs have been investigated. Thickness was changed from 30 to 75 nm. As increasing channel thickness, electrical characteristics were improved due to the increase of the carrier concentration, however thick channel over 42 nm was deteriorated due to the increase of carrier scattering associated with increased trap density. Temperature stresses of a-SZTO TFTs were measured in the temperature range from 300 K to 333 K and activation energy (Ea) falling rate was calculated based on the results of temperature stress in order to investigate the defect states in the band gap. The Ea falling rate was decreased when increasing of channel thickness. Negative bias temperature stress (NBTS) was measured at 333 K, −20 V for 7200 s to determine the stability of a-SZTO TFTs. After NBTS, the electrical characteristics such as the threshold voltage shift (ΔVTH) and the subthreshold swing (S.S), were deteriorated mainly due to the increase of total trap density. To confirm the increase of trap density, DOS was extracted through activation energy. These results indicated that good stability condition is observed at thin channel thickness of 30 nm. We suggest that the thickness of a-SZTO should be optimized for the enhancement of electrical property and stability.