Investigation on Effects of Thermal Stress on SiC MOSFET Degradation through Power Cycling Tests

Abstract

Silicon carbide (SiC) MOSFET reliability becomes crucial to their widespread applications. Many works have been conducted on SiC MOSFET to analyze the degradation of bond-wires, solder layer and semiconductor die under cycling tests. However, the aging effects of thermal stress on above vulnerable areas which are essential for comprehensive understanding of degradation remain unclear. In this paper, discrete SiC MOSFETs with kelvin-source were thermally aged under different thermal conditions in power cycling tests. The variation of die resistance and bond-wire resistance were specifically monitored due to the existence of fourth terminal. The junction-to-case thermal resistance was also computed based on the collected experimental data. Thus, the effects of mean junction temperature and temperature swing on the degradation of bond-wire, solder layer and semiconductor die of SiC MOSFET can be evaluated from the above parameters shift. Besides, the optical images after decapsulation of stressed SiC MOSFET verified the failure mechanism. 1