Investigation of Negative DIBL Effect and Miller Effect for Negative Capacitance Nanowire Field-Effect-Transistors

Weixing Huang,Xiaogen Yin,Yongkui Zhang,Qiang Huo,Yangyang Li,Huilong Zhu,Zhenhua Wu,Kunpeng Jia

doi:10.1109/jeds.2020.3015492

Abstract

In this study, the negative DIBL (N-DIBL), negative differential resistance (NDR), and Miller effect of a negative capacitance nanowire filed-effect-transistor (negative capacitance (NC) NWFET) were analyzed by employing the custom-built SPICE model. In the simulation, the minimum subthreshold swing (SS) reduced to 40 mV/decade with negligible hysteresis, and the on-current amplified by approximately three times. The N-DIBL effect was analyzed by building a model, and the results indicated that the N-DIBL is negatively correlated with the SS. Hence, it is indispensable to make trade-offs between the N-DIBL and SS in NC NWFET applications. Moreover, the Miller effect of a NCFET-based inverter was investigated for the first time. The Miller effect of the NC NWFET-based inverter was considerably improved owing to a high on-current and negative internal gate voltage (when external gate voltage is set to 0V), which is beneficial for high-speed circuit building based on NC NWFETs. The overshoot of the NC NWFET-based inverter is ~43.1% less than that of the NWFET-based inverter, and the propagation delay of the NC NWFET-based inverter is ~73.1% less than that of the NWFET-based inverter at ferroelectric thickness $\text{T}_{\mathrm{ FE}}=3$ nm.

Highlights

RECENTLY, to develop advanced CMOS technology in the sub-3-nm node range, negative capacitance field-effect-transistors (NCFETs) have attracted more attention owing to their exceptional performance and excellent process compatibility with existing CMOS technology [1]-[5]
The Miller effect of a NCFET-based inverter was investigated for the first time, and we found that the Miller effect of the NC NWFET-based inverter was considerably improved owing to the high on-current and negative internal gate voltage (Vint)
The NC NWFET is unstable when TFE is larger than a certain critical thickness

Summary

INTRODUCTION

RECENTLY, to develop advanced CMOS technology in the sub-3-nm node range, negative capacitance field-effect-transistors (NCFETs) have attracted more attention owing to their exceptional performance and excellent process compatibility with existing CMOS technology [1]-[5]. Nanowire field-effect-transistors with negative capacitance (NC) (NC NWFETs) have been considered the most promising candidates for sub-3-nm node [6]-[7]. With the scaling of CMOS technology into deep sub-micrometer features sizes, the miller effect becomes significant and begin to be considered in CMOS gate analysis. A transient inverter simulation was performed to analyze the Miller effect of NC NWFET-based and the underlying NWFET-based inverters

SPICE MODEL AND SIMULATION METHOD

RESULTS AND DISCUSSION

CONCLUSION