Investigation of Cylindrical Channel Gate All Around InGaAs/InP Heterojunction Heterodielectric Tunnel FETs

Abstract

This paper investigated the design and TCAD simulation of heterojunction Tunnel Field Effect Transistor (TFET) with dual gate material. The proposed device structure is designed with narrow bandgap semiconductor material InGaAs (0.74 eV) at source region and wider energy bandgap InP (1.34 eV) at channel and drain regions. The narrow bandgap at source/channel junction improves the tunneling generation rate and the wider bandgap at drain/channel junction reduces the ambipolar behavior. In addition to heterojunction, the dual work function at gate Metal (M1) and Metal (M2) and HfO2/SiO2 stacked dielectric helps to improve the band-gap narrowing as well as reduced leakage current. The proposed device electrical parameters such as Surface potential, energy band diagram, electric field, transconductance and drain current has been analyzed. The simulation results show significant improvement in ON current (10−5A/μm) and reduced OFF current (10−12A/μm) in the proposed device structure. The presented result reveals that the InGaAs/InP heterojunction stacked dielectric TFET is a good candidate for low power applications.