Abstract
Investigation and Design of Stacked Oxide Polarity Gate JLTFET in the Presence of Interface Trap Charges for Analog/RF Applications
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https://doi.org/10.1007/s12633-021-01162-9
Journal: Silicon | Publication Date: May 29, 2021 |
Citations: 9 |
Investigation and Design of Stacked Oxide Polarity Gate JLTFET in the Presence of Interface Trap Charges for Analog/RF Applications
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