A Reliability Study of Non-uniform Si TFET with Dual Material Source: Impact of Interface Trap Charges and Temperature

Jagritee Talukdar,Kavicharan Mummaneni

doi:10.1007/s12633-021-01224-y

Jagritee Talukdar, Kavicharan Mummaneni

Open Access

https://doi.org/10.1007/s12633-021-01224-y

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Journal: Silicon	Publication Date: Jul 5, 2021
Citations: 1	License type: cc-by

Affiliation: National Institute Of Technology Silchar

Abstract

The article reports the extraction of DC characteristics and small signal parameters of Non-uniform Si TFET with dual material source (NUTFET-DMS) at different frequencies followed by its reliability investigation. The reliability of the device is examined by analysing: (1) the impact of the presence of interface trap charges, (2) the impact of temperature variation (200- 400 K). In the analysis it has been observed that in case of absence of interface trap charges the increase in frequency reduces the value of parasitic capacitances. In addition, the presence of interface trap charges lessens the value of parasitic capacitances up to a certain gate to source voltage after that it shows a reverse effect. Further, it has been perceived that the effect of change in temperature is more on device ambipolar current when interface trap charges are present, whereas the reverse is true in the case of OFF state current and different parasitic capacitances.

Highlights

Over the past decades, MOSFET played a very crucial role, as devices scale down short channel effects of MOSFET dominated the platform
It has been perceived that the effect of change in temperature is more on device ambipolar current when interface trap charges are present, whereas the reverse is true in the case of OFF state current and different parasitic capacitances
In tunnel field effect transistor (TFET) as the inversion layer is connected to the drain side even at the higher drain to source voltages the Cgd contribution in total capacitance Cgg is more, which limits the performance of the device

Summary

Introduction

MOSFET played a very crucial role, as devices scale down short channel effects of MOSFET dominated the platform. The mechanism is called band to band tunneling, where electrons move from source valance band to the channel conduction band [1,2,3,4] These advantages of TFET attracted the attention of a lot of researchers as a reliable contender for low power applications. In the process of device optimization, it is a challenge to preserve all the parameters in a single device In this case, [12] has proposed a non‐uniform silicon TFET with a dual‐material source to maintain lower average SS, the non-uniform body which increases the ON current and the compressed body of the drain side maintains a low OFF and ambipolar current too.

Device Structure And Simulation Methodology

Impact of trap charges on small signal parameters of NUTFET-DMS

Impact of temperature on the performance of NUTFET-DMS

Conclusion