Abstract
Dielectric defects play a crucial role in the reliability of MOSFETs. In this study, we aim to gain a deeper understanding of dielectrics’ degradation by correlating the effective interface (N2D) and bulk (NBT) trap densities extracted by different characterization techniques (I-V, charge pumping, and 1/f noise) under different electrical stress conditions. Additionally, we establish an empirical relation between the increase of NBT (estimated via 1/f noise measurements) and N2D,eff (estimated through the monitoring of threshold voltage shift) after stress. This relation is useful to calculate the expected increase in 1/f noise from the VT degradation models typically made available by the foundries to circuit designers.
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