Interfacial trap charge and self-heating effect based reliability analysis of a Dual-Drain Vertical Tunnel FET

Abstract

This manuscript exclusively addresses the reliability concern of a double-drain vertical TFET (DD-VTFET) by analysing the influence of interface trap charges and variation in ambient temperature on various DC and analog/RF figure of merits. For detailed analysis, performance of the device is evaluated by considering different densities and polarities of trap charges existing at gate-oxide/channel interface. TCAD-based simulation results reveal that trap charges significantly alter the flat-band voltage, which further causes variation in the device performance. It is observed from the transfer characteristic curve that the leakage current is degraded from 10−18 to 10−13A/μm when a positive (donor) charge density of 1013 cm−2 is introduced at oxide/channel interface. However, cut-off frequency is found to be improved under the influence of donor traps, which is mainly attributed due to improvement in transconductance of the device. Moreover, simulation results indicate that DD-VTFET is immune to the negative (acceptor) traps in comparison with the positive traps. Furthermore, the analysis carried out for temperature affectability on the device performance suggests that, at higher ambient temperature, the off-state current degrades more in subthreshold region (at low gate bias) due to dominance of the Shockley-Read-Hall (SRH) and trap-assisted tunneling (TAT) mechanisms, which exponentially depend on the temperature. Therefore, the leakage current increases approximately by an order 7 when temperature is increased from 200 K to 400 K. Since band-to-band tunneling starts dominating over SRH and TAT in the super-threshold region (at high gate bias), the impact of temperature variation along with presence of the trap charges is found to be insignificant on the transfer characteristics.