Abstract
Using the finite element analysis (FEA) for the atomic flux divergence (AFD) analysis, the prediction of interconnect reliability for a stacked power amplifier (PA) is achieved effectively to learn the electro-migration (EM) failure of interconnect. As a circuit example, a Ka band PA is designed using a 0.1 μm GaAs pHEMT process, which employs a 3-stacked-FET to obtain about 1-watt output power with corresponding power added efficiency (PAE) of 30-37.4% within a very small chip size of 1.4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . This is the first time to analyze the interconnect reliability for the s tacked MMIC PA, which can help the designers to find the weakest spot for the stacked PA and give some important guidance for PA reliability design.
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