Abstract
Inter-digital capacitors (IDCs) with aerosol-deposition (AD) high-k dielectric layer were compared via simulation and measurements of bare IDCs and AD IDCs at room temperature and subjected to a post-annealing process for realizing capacitive super-sensing applications. IDCs with thin AD films can provide higher capacitive intensity and improvements for other dielectric performances. Therefore, IDC patterns with AD high-k dielectric layers were fabricated by varying the finger widths and gap. Moreover, we analyzed the layer microstructure design patterns using simulations and experiments with AD BaTiO3 as-deposited IDCs and IDCs subjected to annealing at 500 °C. These three different IDCs were measured using an impedance analyzer; furthermore, the AD BaTiO3 films were evaluated using X-ray diffraction, atomic force microscopy, and traveling electron microscopy. The results for the IDCs with the AD BaTiO3 film show the highest capacitance when compared with other thin layer capacitors, which is expected to be useful in realizing super-sensing applications in the future.
Highlights
In recent years, the increasing demand for mass production, miniaturization, and high-density integrated capacitors in communication systems has led to the proliferation of thin-film integrated passive devices (IPDs)[1], high electron mobility transistors (HEMTs)[2], and digital as well as mixed signal applications[3]
Inter-digital circuits (IDCs) for humidity sensing are common among conventional capacitive sensors; these sensors are based on the principle of dielectric changes in thin films upon water vapor uptake
Modeling for multi-layer conductor-facing IDC structures has been studied to predict the capacitive performance during the design step; in particular, the closed form analytical expression derived from the Schwarz-Christoffel conformal mappings were used to determine the capacitance of the sensors[9]
Summary
The increasing demand for mass production, miniaturization, and high-density integrated capacitors in communication systems has led to the proliferation of thin-film integrated passive devices (IPDs)[1], high electron mobility transistors (HEMTs)[2], and digital as well as mixed signal applications[3]. To fabricate materials with high relative permittivity, semiconductor technologies, such as sputtering and low-temperature co-firing ceramics (LTCC) technology, can be used[4]; both sputtering and LTCC technology require sintering at approximately 850 °C to form the desired crystallite structure during the fabrication process Both high temperatures and thermal energy costs related to sintering can be critical limitations for embedding passive devices on integrated circuits. To overcome these problems, recently, the aerosol-deposition (AD) method was developed for the preparation of ceramic films at room temperature[5]. Through computer simulation and measurement of the IDC under the three aforementioned conditions, we confirmed that after the BaTiO3 AD process annealing 500 °C performs two times higher increasing rate from AD process
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