Abstract
Clear correlation between dislocation distribution and FET threshold voltage distribution in undoped LEC GaAs was observed directly for the first time by automatic computer-controlled measurement of drain-source current (Ids) and threshold voltage (Vth). FETs fabricated in the high EPD area, which covers the center and the periphery of (100) wafers, showed high Ids and low Vth, whereas FETs fabricated in the low EPD area showed low Ids and high Vth.
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