Influence of T-gate shape and footprint length on PHEMT high frequency performance

Abstract

Combined hydrodynamic/drift-diffusion simulations of GaAs-based pseudomorphic high electron mobility transistors (PHEMTs) are presented. They do not only take into account the structure of the intrinsic transistor but also model the complex geometries of contacts and dielectric passivation in a realistic manner. Special care was taken to implement a general scheme for the T-gate cross section that allows to model gate profiles realized with electron beam lithography as well as with spacer processes based on optical lithography. Measured dc and RF data of two different PHEMTs (gate lengths 220 and 500 mm, respectively) manufactured on the same wafer with spacer technology are calculated very exactly. The simulator is then used to predict the effects of gate length reduction, modification of the T-gate profile and thinning of the passivation on device RF performance quantitatively. The specific problems of gate spacer processes applied to high frequency devices are identified, and the most effective process improvements are indicated.