Influence of surface morphology on the adhesion strength of plated Cu on the build-up layer within an embedded active package

Abstract

Recently, System in Package (SiP) technology is used to integrate a number of integrated circuits (ICs) enclosed in a single package or a module, which attracts a great attention from electronic industries due to its characteristics of smaller size, higher performance, lower overall cost and reduction of time to market. Based on the configurations of current SiP, there are two types of structure: (1) 2D package, such as the multi-chip package (MCP) and (2) 3D package, such as multi-chip package (MCP), stacked dies, package on package (PoP) and package in package (PiP). Although 3D interconnection by through silicon via (TSV) is beneficial to enhance the transmission of signal between ICs, but the processes are costly and are not stable enough for mass production. ITRI has developed a novel PoP structure mutated from the announced embedded active technology by semi-additive process (SAP). The purpose of this study was to enhance the reliability of the PoP by establishing an optimal process window of the chemical processes used. For achieving this, 2 pieces of 40 μm thick Ajinomoto build-up film (ABF, GX-13R) were laminated to embed a 50 um thick chip in a carrier substrate, in order to improve the adhesive strength of Cu on the ABF, different processing factors such as the pressure profiles of lamination, curing conditions, and desmear parameters were used to form various surface morphologies of the ABF, the relationships between the morphologies and the adhesion strengths were learned by a peeling test. As the experiment results showed, the adhesion strength of Cu on ABF was more significantly influenced by the surface morphology of ABF, rather than the surface roughness, and a coral morphology was believed to greatly improve the adhesion strength than the needle and plated ones.