Abstract

In this study, the effect of $$\hbox {Si}_{3}\hbox {N}_{4}$$ insulator layer on the electrical characteristics of Au/n-4H SiC diode was investigated. The current–voltage ( $${I{-}V}$$ ), capacitance–voltage ( $${C{-}V}$$ ) and conductance–voltage ( $$G/w{-}V$$ ) measurements were carried out at room temperature condition. Under thermionic emission model, electrical parameters as zero-bias barrier height ( $$\Phi _{\mathrm{Bo}}$$ ), ideality factor (n), interface states ( $$D_{\mathrm{it}}$$ ), and series ( $$R_{\mathrm{s}}$$ ) and shunt ( $$R_{\mathrm{sh}}$$ ) resistances were estimated from forward bias $${I{-}V}$$ analyses. The values of n and $$\Phi _{\mathrm{Bo}}$$ were about 1.305 and 0.796 eV for metal–semiconductor (MS) rectifying diode, and 3.142 and 0.713 eV for metal–insulator–semiconductor (MIS) diode with the insertion of $$\hbox {Si}_{3}\hbox {N}_{4}$$ layer, respectively. Since the values of n were greater than the unity, the fabricated diodes showed non-ideal $${I{-}V}$$ behaviour. The energy distribution profile of $$D_{\mathrm{it}}$$ of the diodes was calculated by taking into account of the bias dependence of the effective barrier height ( $$\Phi _{\mathrm{e}}$$ ) and $$R_{\mathrm{s}}$$ . The obtained $$D_{\mathrm{it}}$$ values with $$R_{\mathrm{s}}$$ are almost one order of magnitude lower than those without $$R_{\mathrm{s}}$$ for two diodes. According to Cheung’s model, $$R_{\mathrm{s}}$$ were calculated and these values were found in increasing behaviour with the contribution of $$\hbox {Si}_{3}\hbox {N}_{4}$$ insulator layer. In addition, the $$J_{\mathrm{R}}{-}V$$ plot behaviours with linear dependence between ln( $$J_{\mathrm{R}}$$ ) vs. $$V^{0.5}$$ indicated that the dominant conduction mechanism in the reverse bias region was Schottky effect for both MS and MIS diodes. In the room temperature $${C{-}V}$$ measurements, different from the results of MIS diode, the values of C for MS diode was observed in decreasing behaviour from ideality with crossing the certain forward bias voltage point ( $$\sim $$ $$2.5\ \hbox {V}$$ ). The decrease in the negative capacitance corresponds to the increase of G / w.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call