Abstract
In recent years, portable electronic packaging products such as smart phones, tablets, notebooks and other gadgets have been developed with reduced size of component packaging, light weight, high speed and with enhanced performance. Thus, flip chip technology with smaller solder sphere sizes that would produce fine solder joint interconnections have become essential in order to fulfill these miniaturization requirements. This study investigates the interfacial reactions and intermetallics formation during reflow soldering and isothermal aging between Sn-4.0Ag-0.5Cu (SAC405) and electroless nickel/immersion palladium/immersion gold (EN(P)EPIG). Solder diameters of 300 μm and 700 μm were used to compare the effect of solder volume on the solder joint microstructure. The solid state isothermal aging was performed at 125°C starting from 250 hours until 2000 hours. The results revealed that only (Cu,Ni)6Sn5 IMC was found at the interface during reflow soldering while both (Cu,Ni)6Sn5 and (Ni,Cu)3Sn4 IMC have been observed after aging process. Smaller solder sizes produced thinner IMC than larger solder joints investigated after reflow soldering, whereas the larger solders produced thinner IMC than the smaller solders after isothermal aging. Aging duration of solder joints has been found to be increase the IMC’s thickness and changed the IMC morphologies to spherical-shaped, compacted and larger grain size.
Highlights
During the last two decades surface mount technology (SMT) has become the dominant manufacturing technology for electronic products, mainly because of its cost-effective highvolume production capability
It can be clearly seen that the dominant intermetallic compound (IMC) formed was identified as (Cu,Ni)6Sn5 and exhibited rod-like and/or needle-shape morphology for the smaller and larger solder size
The thickness of this IMC layer for the Ø300μm solder was found to be 0.71μm which is relatively thinner than that recorded in the Ø700μm solder at 1.71μm
Summary
During the last two decades surface mount technology (SMT) has become the dominant manufacturing technology for electronic products, mainly because of its cost-effective highvolume production capability. It has made possible the manufacturing of extremely high-density portable electronics with good quality and reliability [1]. Smaller electronic devices are faster because of the signals do not have to travel as far within the device. Packing more functionality into a smaller or same-sized device reduces the cost of electronics. With this continuous miniaturization and increasing functionality of electronic components, the microelectronic industry keep moving towards fine pitch devices. Area array components have evolved to meet the demands of the industry and the chip scale package (CSP) is becoming one of the main products in the integrated circuit (IC) industry [2]
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