Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs With a Field Plate

Abstract

Vertical III-V heterostructure MOSFETs exhibit outstanding performance at reduced supply voltages. In this letter, we report on a novel process of extending high-speed device operation towards higher voltages. The device vertical geometry allows for engineering a field plate by covering the nanowire drain area with a 10-nm-thick SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> film. The film acts as a field moderator in the device drain region. Reference devices without a field plate exhibit a transconductance of 2.5 mS/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> , while devices with a 120-nm-long field plate show 1.5 mS/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> but a three times increase in breakdown voltage. Measurements show that the field-screening effect attributes to reduced band-to-band tunneling and impact ionization, thereby reducing the parasitic bipolar effect in the MOSFET channel as well. The devices show promise in applications in circuits and systems requiring large power-handling.