In-situ heater for thermal assist recovery of MOS devices in 28 nm UTBB FD-SOI CMOS technology

Abstract

Preliminary results are reported on an in-situ heater for thermal assist recovery of MOS transistor and is demonstrated in 28 nm Fully Depleted Silicon-On-Insulator (FD-SOI) Ultra-Thin Body and Buried oxide (UTBB) high-k metal gate CMOS technology. This approach consists in functionalizing the source of a MOS device. We demonstrate that it is possible to heat the device with the current flowing between two split source contacts. Electrical and temperature measurements of the structures were made at wafer level. Moreover, 3D TCAD electro-thermal simulations assess the concept. The thermal resistor calibration on source and gate are performed on low and high VT NMOS devices with thin and thick high-k metal gate oxide. We have successfully reproduced the I-V responses on several samples at wafer level by electrical sweep in the 100 ns range into the split source contacts. The local temperature change effect was measured from room temperature up to +300 K. Finally, this first study shows that the thermal recovery is efficient and opens the door on new innovative solutions and could be applied on other technology nodes.