Improving the breakdown voltage, ON-resistance and gate-charge of InGaAs LDMOS power transistors

Abstract

Recently, a lateral double-diffused metal-oxide-semiconductor (LDMOS) using In0.53Ga0.47As having an extended-p+ (ep+) body has been shown to be better than a conventional silicon-based LDMOS. In this paper, we show that using a stepped gate (SG) for the InGaAs LDMOS, a significantly improved performance can be achieved over using an ep+ body for the InGaAs LDMOS. The proposed device has three steps with the gate oxide thickness increasing from the source to the drain. The SG oxide has the following advantages: a good gate control is achieved because of the smaller oxide thickness near the source, lesser gate-to-drain capacitance is possible due to the greater oxide thickness near the drain and the ON-resistance decreases as a consequence of increased drift region doping which is possible due to the increased thickness of the gate oxide over the drift region. The large mobility of electrons in InGaAs also enhances the current flow and reduces the ON-resistance. Based on 2D device simulation results, we show that the SG LDMOS using InGaAs exhibits 49.7% improvement in the breakdown voltage, 43.8% improvement in the ON-resistance, 105.0% improvement in the range of transconductance, 33.6% improvement in the gate charge and 60.1% improvement in the switching speed as compared to an LDMOS using InGaAs with buried–p+ body.