Improving a-InGaZnO TFTs Reliability by Optimizing Electrode Capping Structure Under Negative Bias Illumination Stress

Abstract

This study enhances the reliability of via-contact type amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) with optimal contact capping area under negative bias illumination stress (NBIS). The $\text{I}_{\text {D}}$ - $\text{V}_{\text {G}}$ transfer curves for source and drain electrodes with no capping area exhibited a larger negative threshold voltage ( $\text{V}_{\text {TH}}$ ) shift after NBIS. Similarly, the drain electrode with capping area also shows serious electrical degradation. Compared to these two electrode types, however, a source electrode with capping area exhibited excellent stability after NBIS due to the lack of holes injecting into the gate oxide near source side. This optimal contact capping area provides a novel device structure which improves NBIS reliability. Finally, this work utilizes the SILVACO technology computer-aided design (TCAD) simulation to demonstrate the changes in the energy band and electron field distribution after NBIS for different capping metal structures. Then the hole injection and electrical degradation mechanisms are verified.