Abstract

The intellectual property protection of deliverable cores is a major challenge for the design of digital systems based on reusable modules. Usually, the existing protection procedures introduce a digital signature identifying the authorship into the core under protection, which must be recovered later for verification purposes. The recovery of the signature is particularly difficult when the Intellectual Property (IP) cores are embedded into complex systems, without direct access to the input/output pins. In the present paper, improved techniques based on power watermarking for introducing and extracting a digital signature from embedded cores are presented, providing a complete framework for the protection of IP cores. Moreover, the protection module can accommodate part of the combinational logic of the core under protection, causing malfunction of the system if the protection is removed. Experimental results and several design examples show the suitability and robustness of the proposed methods.

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