Abstract

The chapter describes a robust physiological biometrics-based methodology using facial signature biometric for hardware security and intellectual property (IP) core protection (Sengupta and Rathor, 2021). In this methodology, first, the facial biometric signature of IP vendor is extracted and subsequently transformed into encoded constraints for hardware security using multi-level encoding specified by IP vendor. Next, these generated secret constraints for hardware security are inserted inside the design at the register allocation stage of high-level synthesis (HLS) process. These embedded facial security constraints act as digital evidence to enable security of IP core design against several security threats. The hardware security methodology based on facial biometric enables the robust and seamless detective control against the threat of IP piracy. Additionally, it also protects the ownership rights of authentic IP vendor, in case if a rogue system on chip (SoC) integrator or an adversary at foundry, falsely claims the IP ownership.The rest of the chapter has been organized as follows: Section 3.1 provides the introduction of the chapter; Section 3.2 highlights the importance of HLS for designing digital signal processing (DSP) coprocessors; Section 3.3 presents the discussion and analysis of alternative techniques used for Intellectual property protection (IPP) of DSP coprocessors; Section 3.4 explains the features of facial biometric for IPP and its advantage over fingerprint biometrics; Section 3.5 shows the summary of facial biometric methodology for IPP; Section 3.6 explains the details of facial biometric methodology for IPP; Section 3.7 presents a case study of designing safeguarding N-point discrete Fourier transform (DFT) design using facial biometrics; Section 3.8 discusses security properties of facial biometric methodology for hardware security; Section 3.9 provides analysis and discussion and Section 3.10 concludes the chapter.

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