Improvement of Written-State Retentivity by Scaling Down MNOS Memory Devices

Abstract

New MNOS retention characteristic phenomena are demonstrated. Shrunk MNOS memory devices are closely evaluated. While charge retentivity of the erased state depends only slightly on silicon nitride thickness, written-state retentivity is improved by reducing silicon nitride thickness. These new phenomena are applied to memory device design. A 1 M bit MNOS EEPROM can be designed with silicon nitride thickness 20.0 nm and programming voltage 10.7 V. These results show the MNOS memory device to be a very promising candidate for Megabit EEPROM's.