Abstract
In this paper, an improved modeling and parameter-extraction procedure requiring no special de-embedding test structures, reverse/high-forward-biased measurements, or the use of numerical optimization process has been successfully developed to efficiently determine the equivalent-circuit parameters of collector-up heterojunction bipolar transistors. This new approach, modified from a previous work by our group, emphasizes the ad hoc analytical extraction of extrinsic inductances ( L b, L c, L e) and base–collector capacitances ( C ex, C bc), which are crucial parameters for characterizing RF performances in device modeling. A comprehensive set of practical modeling equations is derived from systematically formulating two-port-network matrices on the basis of measured S-parameters. Physically realistic results are demonstrated under various biasing conditions for the p–n–p InGaAs collector-up heterojunction bipolar transistor with a graded base of 25 nm. The superiority of the improved technique is verified by observing the consistency between calculated and measured S-parameters.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call