Abstract
h/sub fe/ degradation in bipolar transistors caused by reverse V/sub be/ stress decreases the reliability of BiCMOS circuits. In this paper, we present an improved circuit technique to limit reverse V/sub be/, and thus significantly increase BiCMOS reliability. The technique also reduces the base-emitter breakdown voltage constraint on BiCMOS technology design.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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