Abstract

Big data applications involved with neural networks requires frequent data transfer between memory and processing elements and thus, take a significant portion of energy. One possible method is to realize logic operations inside the memory, often known as <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in-memory computing</i> . The memristor employed in a crossbar can also conduct logic operations, making it a promising candidate for enabling such designs. In-memory computing can vastly improve speed efficiency by significantly reducing memory access time and energy. Therefore, efficient operations inside the memory are crucial for data-intensive applications. This paper presents two high-speed adders in memristive technology, which are derived using IMPLY-based logic operations and can be implemented on a crossbar architecture for in-memory computing. One is a carry select adder, which uses efficient ripple carry adders and multiplexers. While the other is a conditional carry adder, designed using a modified half adder and multiplexers. An IMPLY-based multiplexer and modified half adder are proposed as part of these adders. A modified half adder calculates the sum of two inputs and two carry outputs for various carry inputs. Compared to conventional adder designs, the speed of these two adders has been significantly enhanced. In particular, the proposed 32-bit Carry Select Adder and Conditional Carry Adder take 123 and 90 computational steps, respectively. The proposed adders have improved the speed by 30 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> and 49 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> , respectively, compared to the best-existing adder in IMPLY. Further, this paper presents computational steps and the number of memristors required for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$n$</tex-math></inline-formula> -bit adders. The proposed circuits were simulated using the VTEAM model, and energy consumed per each adder is calculated from the simulations.

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