Abstract

In communication subsystems such as Micro air vehicles MAV's, it becomes mandatory to design the circuits with low power and low voltage to enhance the system by means of long sustainability and less power consumption with maintenance free operation, especially in the circuits like Analog to Digital Converters (ADCs). ADCs used to convert the analog signal into digital signal, since the real world signals are available as analog signal. In the proposed low power low voltage Novel SAR ADC architecture (LFSR logic), the charge distribution based DAC has been replaced instead of segmented current steering DAC approach to minimize the area, power consumption and improves the speed of the design. The analog input frequency is 75MHz and oversampling conversion frequency is 750MHz with 27.4mW low power design is achieved with this technique. This is implemented in 180nm technology.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.