Implementation And Comparison of Different Stages of Current Starved CMOS Ring Oscillator – A Study

Abstract

The ring oscillators serves as the fundamental building blocks in both digital and analog circuit design, as its extensive use is found in various electrical systems, including phase-locked loops, frequency dividers, and clock generators. This study gives a general overview of the ring oscillator circuit, including its workings, uses, and important design considerations. The ring oscillator generates timing signals for synchronous operation and is often employed as a clock generator in digital systems. It may also be used as a frequency divider to separate higher frequencies into lower ones. A closed loop is used to connect an odd number of inverting stages to create the ring oscillator circuit. An inverter, which is often built using complementary metal-oxide-semiconductor (CMOS) technology, is a component of every stage. By adding a delay to each step, the ring oscillator creates a self-sustaining oscillation. The development and comparison of 3, 5, and 7 stage ring oscillators for different performance metrics, as well as corner analysis for propagation delay and the effect of temperature on the operation of the ring oscillator was performed using Cadence Virtuoso with 90nm technology. This comparison of several phases of a current-starved (CS) ring oscillator offers an advantage to the best design with innovation based on the technology employed and outcomes from the corner analysis, which hasn't been done in any of the more recent researches.