Impact of the lateral straggle on the Analog and RF performance of TFET

Abstract

In this work, the effect of the variation in lateral straggle on TFETs performance is demonstrated. The ion implantation technique during fabrication process causes the extension of dopants from source/drain region towards the channel. Even though the use of non-zero tilt angle at the time of ion implantation is necessary to avoid the channeling effect, however, series resistance, threshold voltage roll offs, switching speed and effective channel length of the device get affected by the non abrupt doping profile at the source/drain-body junction. It is established earlier that TFET is very convenient for Analog/RF application owing to its below 60mV/decade subthreshold swing and reduced short channel effects. In order to show the effect of lateral straggle on TFET’s performance, various Analog figure of merits (FOMs) such as drain current (Id), transconductance (gm), transconductance generation factor (gm/Id), output resistance (Ro), intrinsic gain (gmRo) and RF figure of merits (FOMs) like unity gain cutoff frequency (fT), transit frequency of maximum available power gain (fMAX) are investigated for the variation in straggle parameter from 0nm to 5nm in order to optimize the device performance. The circuit performance of the device for different lateral straggle is carried out using common source amplifier.