Performance Evaluation of 10nm SMG FinFET with Architectural Variation towards DC/RF and Temperature Aspects

Abstract

FinFET structures of 10 nm technology node with promising design enhancements like hybrid spacer, raised source and drain extensions, and silicide interfaces have been analysed and compared. Analog figures of merit like drain current, transconductance, intrinsic gain, and transconductance generation factor are determined here. Furthermore, RF figures of merit like cut-off frequency, intrinsic delay, and gate capacitance are analysed. These parameters have been determined at three different temperatures (200 K, 300 K, 400 K) to study the effect of temperature on device performance.