Impact of self-heating on RF/analog and linearity parameters of DMG FinFETs in underlap and overlap configurations

Abstract

In this paper, the influence of self-heating effect (SHE) on the performance of Silicon on Insulator (SOI) dual material gate (DMG) FinFETs in underlap and overlap configurations for RF/analog applications is reported using three-dimensional TCAD simulators. The increase in electron velocity at channel surface is due to reduce effective electrical field at drain end, resulting in smaller DIBL and hot carrier effects. The device insights are reported by electron velocity, lattice temperature, thermal resistance, and output conductance versus frequency profiles. The findings on analog/RF figures of merit such as transconductance (gm), output conductance (gd), intrinsic gain (Ai), gate capacitance (Cgg), intrinsic delay (τ), cut-off frequency (fT), transconductance generation factor (TGF), gain frequency product (GFP), transconductance frequency product (TFP), and gain transconductance frequency product (GTFP) are reported with and without SHE. The results show that analog performance of Conventional and Underlap structures are improved but the influence of SHE is more deteriorating on Overlap structure. Furthermore, the linearity performance parameters VIP2, VIP3, IIP3, and 1 dB compression point are degraded with self-heating is due to increase in gm2 and gm3 values. It is seen that the gate overlap structure exhibits higher ON state performance which even after deterioration with Self-heating is still better than its counterparts as it has better gate controllability stemming from its lower effective channel length.