Impact of gate material engineering on ED‐TFET for improving DC/analogue‐RF/linearity performances

Abstract

To avoid the fabrication complexity and cost of nanoscale devices, a dual metal gate (DMG) in polarity controlled electrically doped tunnel field-effect transistor (ED-TFET) has been introduced first time for DC, analogue/radio frequency (RF) and linearity performance improvement. The formation of n+ drain and p+ source regions are done by applying polarity biases of PG-1 as 1.2 V and PG-2 as −1.2 V, respectively, over the silicon body in DMG-ED-TFET. Different analogue/RF and linearity performance metrics of DMG-ED-TFET are evaluated using ATLAS device simulator and compared with that of ED-TFET. The figure of merits (FOMs) studied in this work for DMG-ED-TFET are in terms of transconductance, gate-to-drain capacitance, gain bandwidth product, cut-off frequency and linearity parameters such as third-order transconductance coefficient ( g m 3 ), VIP3, IIP3 and IMD3. From the simulations, it is found that DMG-ED-TFET achieves significant improvement in these FOMs as compared to ED-TFET due to introduction of dual metal at gate electrode (gate workfunction engineering). The work has also optimised the proposed device to attain optimum analogue/RF and linearity performance.