Metal Wet Etch Issues and Effects in Dual Metal Gate Stack Integration

Abstract

This article discusses metal wet etch issues and their effects on high-/metal films in dual work function metal gate stack integration. A versatile process using metal wet etch has been demonstrated to integrate dual metal gate complementary metal oxide semiconductor (CMOS) devices (Z. B. Zhang et al. , in 2005 Symposia on VLSI Technology and Circuits, Kyoto , Japan, June 14–18 , 2000). Different high-/metal films, combinations of films, etch selectivity, thermal stability, interactions among the films, and finally, surface conditions have made the implementation of metal wet etch challenging. Here, representative results using , , in situ steam generated silicon oxide , , Ta, , , , amorphous silicon (a-Si), and tetraethylorthosilicate in dual metal CMOS processing are presented.