Impact of Different Barrier Layers and Indium Content of the Channel on the Analog Performance of InGaAs MOSFETs

Abstract

A barrier layer in an InGaAs MOSFET, which shows promise for high-performance logic applications due to enhanced electron mobility, is known to further improve the electron mobility. In this paper, a detailed investigation of the impact of different barrier layers on the analog performance of an InGaAs MOSFET is reported for the first time. The device parameters for analog applications, such as transconductance (gm), transconductance-to-drive current ratio (gm/IDS), drain conductance (gd), intrinsic gain (gm/gd), and unity-gain cutoff frequency (fT) are studied with the help of a device simulator. A barrier layer is found to improve the analog performance of such a device in general; with a double-barrier layer showing the best performance. An investigation on the impact of varying the indium content in the channel on the analog performance of an InGaAs MOSFET with a double-barrier layer is also reported in this paper. It is found that a higher In content results in better analog performance of such devices.