Impact of channel width on back biasing effect in tri-gate MOSFET

Abstract

The impact of channel width on back biasing effect in n-type tri-gate metal-oxide semiconductor field effect transistor (MOSFET) on silicon-on-insulator (SOI) material was investigated. In narrow device (Wtop_eff=20nm), the relatively high control of front gate on overall channel leads to the reduced electrostatic coupling between back and front channels as well as the suppression of back bias effects on both channel threshold voltage and the effective mobility, compared to the planar device (Wtop_eff=170nm). The lower effective mobility with back bias in narrow device was attributed to poorer front channel interface, and, to significant effect of sidewall mobility. The back biasing effect in tri-gate MOSFET was successfully modeled with 2-D numerical simulation. Through the simulation, the mobility results were interpreted as the consequence of two kinds of mobility degradations, i.e. different mobility attenuation along lateral and vertical directions of channel and additional mobility degradation in narrow device due to the effect of sidewall mobility. The potential profile extracted from numerical simulation provides strong evidence showing different degree of electrostatic coupling in narrow device and planar device due to a relative influence of front gate bias control over channels.