Abstract
The engineered trap layer with nanocrystal and high-k blocking oxide are applied to the FinFET structure. The increased trap density of the hybrid nanocrystal trap layer and the enhanced leakage reduction of Al x O y are proposed as a dominant role of the larger program and erase window of 8.3 V which is applicable to the MLC Flash memory device
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have