Abstract
Hot-carrier, inducing source-drain current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) increase in high-voltage p-channel lateral DMOS (LDMOS) transistors, is investigated. At low gate voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> ) and high drain voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ), electrons are injected into the gate oxide, creating negative fixed oxide charges and interface-states above the accumulation region and the channel towards the source side (Figure 1). The source drain current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) increase leads to threshold voltage shift (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> →0V) and for higher stress conditions a drain-source leakage can be observed. The effect has been analyzed combining experimental data and TCAD simulations. For the first time recovery effect after hot carrier stress even at low temperature is reported.
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