Abstract

In this work, four kinds of lateral double-diffused MOS (LDMOS) devices with different split shallow trench isolation (STI) structures (Device A: LDMOS with traditional split-STI, Device B: LDMOS with slope-STI, Device C with step-STI and Device D with H-shape-STI) have been fabricated and the hot-carrier reliabilities also have been investigated due to the serious environment they are endured. The maximum bulk current (Ibmax) stress and the maximum gate voltage (Vgmax) stress have been carried out and the inner mechanism of device degradation have been investigated successfully. With the assistance of the T-CAD simulation tools, it is found that the main damage point locates at the STI conners with a mount of interface states generation, inducing serious degradation for these four devices. The Device D owns high hot-carrier reliability due to its special structure with narrow split-STI. The worst device is Device C because of the presence of extra STI damage point. Finally, a mechanism verification, the charge pumping (CP) method has been applied to better understand this work.

Highlights

  • Lateral double-diffused MOS (LDMOS) is usually applied in the integrated power circuits due to its high off-state breakdown voltage (BVoff), low special resistance (Ron,sp) and easy integration

  • Some approaches have been studied to improve the balance of BVoff and Ron,sp of the shallow trench isolation (STI) LDMOS

  • For the Ibmax stress, the interface states generation in the STI corners is the main reason for the Ron degradation of four devices

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Summary

INTRODUCTION

Lateral double-diffused MOS (LDMOS) is usually applied in the integrated power circuits due to its high off-state breakdown voltage (BVoff), low special resistance (Ron,sp) and easy integration. A special change applying on the STI profile can effectively reduce the Ron,sp by decreasing the current block effect of STI [3], or splits the gate to realize higher BVoff by decreasing the electric field at STI corners [4]. The split-STI LDMOS is used as an output device such as display drivers, DC-DC converts and power managements, operating in high electric field and large current conditions [8,9,10]. In this way, the hot-carrier reliability is inevitably affected and even pull down the entire circuit performance. To make a further comprehensive study of the hot-carrier reliabilities for the four devices, the CP method has been applied to verify the analyzed inner mechanisms by T-CAD simulator

DEVICE STRUCTURE AND PARAMETERS
EXPERIMENTS AND DISCUSSIONS
Maximum Bulk Current Condition
Device A Device B Device C Device D
STI N-draft region
Mechanism Verification by Charge Pumping Method
CONCLUSION

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