Hot carrier degradation of lateral DMOS transistor capacitance and reliability issues

Abstract

This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms.