High-Voltage Generation With Stacked Photodiodes in Standard CMOS Process

Abstract

In this letter, a method to generate a high open-circuit voltage using integrated photodiodes fabricated in a standard CMOS process is described. In contrast to conventional high-voltage generation schemes that serially connect photodiodes using different substrates or high-cost silicon-on-insulator processes, the proposed scheme preserves a single substrate solution using a low-cost standard CMOS process. The proposed scheme exploits the photocurrent generation capabilities of different photodiode implementations available in a standard CMOS process and provides compensation for parasitic losses to generate a high output voltage using series connections of photodiodes. Output voltages of 0.84 and 1.3 V are successfully generated by two-stage and three-stage photodiode connections using an AMS 0.35-μm standard CMOS process, respectively. Our proposed scheme is therefore suitable for low-cost high-integration-level system-on-chip implementations utilizing integrated solar energy harvesting with high-voltage generation.